Discrete multitone modulation (DMT)—also multicarrier modulation—is a modulation method which is particularly suitable for transmitting data via linearly distorting channels. Compared with so-called single carrier methods such as, for example, amplitude modulation which has only one carrier frequency, a multiplicity of carrier frequencies are used in discrete multitone modulation. In this type of modulation, a signal is composed of many sinusoidal signals, each individual signal having one carrier frequency and being amplitude- and phase-modulated by quadrature amplitude modulation (QAM). This provides a multiplicity of quadrature amplitude modulated or QAM modulated signals. In this arrangement, a particular number of bits can be transmitted per carrier frequency. Due to the flexibility of the adaptation of the data rate or of the transmission spectrum to the transmission channel or the interference environment, advantages can be obtained compared with single carrier methods. Discrete multitone modulation is used, for example, for digital audio broadcasting (DAB) with the designation OFDM (Orthogonal Frequency Division Multiplex) and for transmitting data via telephone lines such as, e.g. in ADSL (Asymmetric Digital Subscriber Line).
In ADSL, data are transmitted with the aid of a DMT modulated signal from a switching center to a subscriber with analog connection via the telephone network. In this context, ETSI and ANSI standards specify that each carrier frequency has a bandwidth of approximately 4 kHz and transports a maximum of 15 bit/s/Hz. The actual number of bits/s/Hz can be different for each carrier frequency as a result of which the data rate and the transmission spectrum can be matched to the transmission channel.
A DMT transmission system has a coder which combines the bits of a serial digital data signal to be transmitted into blocks. Depending on the scaling of the QAM modulation, a complex number is allocated in each case to a particular number of bits in a block. A complex number represents a carrier frequency fi=i/T, with i=1, 2, . . . , N/2 of the discrete multitone modulation, all carrier frequencies fi being equidistantly distributed. T is the period of one block. The carrier frequencies represented by signal vectors are transformed into the time domain by means of an inverse Fourier transform (IFT), where they directly represent N samples of a DMT signal to be transmitted. The complex signal vectors can be thought of as complex amplitudes of cosinusoidal oscillations (real part) and sinusoidal oscillations (imaginary part) to be sent out within a block. If a power of 2 is selected for N, the inverse fast Fourier transform (IFFT) can be used for the transformation into the time domain, which greatly reduces the implementation effort.
After the inverse fast Fourier transform, a cyclic prefix is carried out, where the last M (M<N) samples are appended again to the start of a block. As a result, a periodic signal is simulated to a receiver when the recovery generated by a transmission channel has decayed after M samples in accordance with a time T·M/N. The amount of equalization required in the receiver can be greatly reduced by means of the cyclic prefix since, after the demodulation in the receiver, it is only necessary to multiply by the inverse transfer function of the transmission channel in order to eliminate the linear distortions of the transmission channel. This requires one complex or four real multiplications for each carrier frequency.
In ADSL, the transmission channel is a two-wire line (twin copper wire). In comparison with the length of a block, the two-wire line requires a large amount of time for the recovery, which requires a relatively large cyclic prefix. On the other hand, the additional transmission capacity needed by the cyclic prefix should be as low as possible. With a block length of N=512, a cyclic prefix of M=32 is specified for ADSL. However, the recovery of the two-wire line has not yet decayed after M=32 values. As a result, disturbances occur in the receiver which cannot be eliminated by an equalizer in the frequency domain.
Such disturbances can be reduced in the receiver with the aid of special signal processing measures. For this purpose, a time domain equalizer (TDEQ) is connected in front of a demodulator. The time domain equalizer is constructed as a digital transversal filter with adjustable coefficients. The function of the time domain equalizer consists in shortening the recovery of the transmission channel or, respectively, shortening the impulse response of the overall system which consists of a transmitter, the transmission channel and the time domain equalizer. Accordingly, the number of impulse response values of the digital transversal filter must be smaller than the number M of the samples of the cyclic prefix if possible. The design of such time domain equalizers can be found in Al-Dhahir, N., Cioffi, J. M., “Optimum Finite-Length Equalization for Multicarrier Transceivers”, IEEE Trans. on Comm., Vol. 44, No. 1, January 1996. A disadvantage of such time domain equalizers is, however, the high additional circuit complexity which is due to the large number of coefficients (between 20 and 40 coefficients) exhibited by the digital transversal filter used as time domain equalizer. A further disadvantage of such time domain equalizers is the high computing effort, which is approximately 50 to 100 million multiplications per second with a filter length of 20 to 40 coefficients and is associated with correspondingly high circuit complexity. In addition, each coefficient must be adjusted for adapting the digital transversal filter.
FIG. 5 shows a circuit arrangement, described in DE 199 01 465, for compensating, at the receiver end, for disturbances in a signal generated by means of discrete multitone modulation. A serial/parallel converter 1 receives digital samples of a signal IN generated by means of discrete multitone modulation. The serial/parallel converter 1 forms blocks from the digital samples supplied, one block having a multiplicity of N parallel signals which are supplied to a demodulator 2, where N should be a power of 2.
The demodulator 2 is a fast Fourier transform demodulator which converts the multiplicity of N parallel signals supplied in the time domain into a multiplicity of n carrier frequencies f1-fn in the frequency domain, each carrier frequency being used for quadrature amplitude modulation (QAM) in the discrete multitone modulation. Each carrier frequency has a signal vector a1, b1 to an, bn. Each signal vector exhibits two elements which represent a real part and an imaginary part of a complex number. The amount and phase of the complex number are associated with the signal QAM-modulated under the carrier frequency. The respective carrier frequency is also called frequency channel or channel. In ADSL, for example, of 256 carrier frequencies which in each case are spaced apart by 4.3125 kHz, carrier frequencies 7 to 250, corresponding to a frequency spectrum of 30.1875 kHz to 1078.125 kHz are used for signal transmission and the frequency range below that up to 4 kHz is used for voice transmission.
Corresponding to the multiplicity of signal vectors or carrier frequencies, n frequency domain equalizers 3-1, . . . , 3-n (FDEQ) are provided for equalizing the signal vectors a1, b1 to an, bn. A frequency domain equalizer is used for the channel equalization of a signal vector. The frequency domain equalizer multiplies the input signal thereof by the respective inverse complex channel transfer function value. For this purpose, each frequency domain equalizer can be adapted to the transfer characteristic of the transmission channel which is specific to a carrier frequency. At the output of each frequency domain equalizer 3-1, . . . , 3-n, an equalized signal vector a1′, b1′ to an′, bn′ is in each case present.
Each frequency domain equalizer 3-1, . . . , 3-n is in each case followed by a decision circuit 4-1 or 4-n, respectively. A decision circuit decides which signal state in the signal state space of the QAM-modulated carrier frequencies is allocated to a signal vector supplied. A signal state corresponds to a value-discrete signal vector a1″, b1″ to an″, bn″ which has a value-discrete amplitude and a value-discrete phase. The decisive factor for a correct allocation of a signal vector to a value-discrete signal vector is a signal vector which is disturbed as little as possible by the transmission.
Each decision circuit 4-1, . . . , 4-n is in each case followed by a decoder circuit 5-1 or 5-n, respectively. A decoder circuit decodes the binary signals OUT0 to OUTn, contained in the signal vector, from a supplied value-discrete signal vector a1″, b1″ to an″, bn″.
An arbitrary equalized signal vector a1′, b1′ is used as the reference signal vector. The frequency channel allocated to the reference signal vector is, therefore, called the reference frequency channel. The reference signal vector of the reference frequency channel is converted into a value-discrete reference signal vector a1″, b1″ by the first decision circuit 4-1. The reference signal vector is used for correcting all other signal vectors. This is possible due to the mutual dependence of the individual signal vectors.
From the reference signal vector, an error signal vector is generated which is used for correcting all other signal vectors. For this purpose, the real part a1′ and the value-discrete real part a1″of the reference signal vector are supplied to a first subtracting circuit 6 and subtracted from one another. At the output of the first subtracting circuit 6, a real part Δa1 of a complex number is present which represents the error signal contained in the error signal vector Δa1, Δb1. The imaginary part b1′ and the value-discrete imaginary part b1″ of the reference signal vector are correspondingly supplied to a second subtracting circuit 7. At the output of the second subtracting circuit 7, an imaginary part Δb1 of the complex number is present which represents the error signal contained in the error signal vector Δa1, Δb1. The formula for forming the elements of the error signal vector from the elements of the reference signal vector is:Δa1=a1′=a1″ and Δb1=b1′−b1″
However, the error signal vector Δa1, Δb1 is adapted to the signal vector to be corrected with the aid of coefficients and added for correction to the signal vector corresponding to a frequency channel to be corrected.
In the text which follows, this method is described with the example of an arbitrary frequency channel which corresponds to an equalized signal vector an′, bn′. Each frequency channel is corrected apart from the frequency channel which exhibits the reference signal vector. The real part Δa1 of the error signal vector is supplied to a first multiplier circuit 8 and, in parallel, to a second multiplier circuit 11. The first multiplier circuit 8 multiplies the real part Δa1 of the error signal vector by a first coefficient Caan. The second multiplier circuit 11 multiplies the real part Δa1 of the error signal vector by a second coefficient Cabn. The imaginary part Δb1 of the error signal vector is supplied to a third multiplier circuit 9 and, in parallel, to a fourth multiplier circuit 10. The third multiplier circuit 9 multiplies the imaginary part Δb1 of the error signal vector by a third coefficient Cban. The fourth multiplier circuit 10 multiplies the imaginary part Δb1 of the error signal vector by a fourth coefficient Cbbn.
The output signals of the first multiplier circuit 8 and of the third multiplier circuit 9 are supplied to a first adder circuit 12. A real part an′ of the equalized signal vector an′, bn′ which is present at the output of a frequency domain equalizer 3-n is also supplied to the first adder circuit 12. The first adder circuit 12 adds the three supplied signals to an error-corrected real part an* of the signal vector. The output signals of the second multiplier circuit 11 and of the fourth multiplier circuit 10 are supplied to a second adder circuit 13. The second adder circuit 13 is also supplied with an imaginary part bn′ of the equalized signal vector an′, bn′, which is present at the output of the second frequency domain equalizer 3-n. At the output of the second adder circuit 13 which adds the three signals supplied, an error-corrected imaginary part bn* of the signal vector is present.
The method described above can be expressed by the following formulae:an*=an′+Caan.Δa1+Cban.Δb1bn*=bn′+Cabn.Δa1+Cbbn.Δb1
The error-corrected real part an* and the error-corrected imaginary part bn* of the error-corrected signal vector an*, bn* are supplied to a second decision circuit 4-n which converts the error-corrected real part an* and the error-corrected imaginary part bn* into a value-discrete real part an″ or, respectively, into a value-discrete imaginary part bn″ of a value-discrete signal vector an″, bn″. The value-discrete signal vector an″, bn″ is supplied to a decoder circuit 5-n. The decoder circuit 5-n decodes the signal OUTn from the supplied signal vector.
In this method, for each signal vector apart from the reference signal vector, the error signal vector is weighted in accordance with the frequency channel to be corrected and added to the equalized signal vector associated with the frequency channel. The weighting coefficients Caan, Cban, Cabn and Cbbn for weighting the error signal vector can be adjusted step by step by means of an iterative algorithm for error minimization such as, for example, the mean square error (MSE) algorithm.Caan(k)=Caan(k−1)−g·Δa1(k)·Δan(k)Cbbn(k)=Cbbn(k−1)−g·Δb1(k)·Δbn(k)Cabn(k)=Cabn(k−1)−g·Δa1(k)·Δbn(k)Cban(k)=Cban(k−1)−g·Δb1(k)·Δan(k)  (1)
k designates a discrete time and g specifies a correcting variable. To calculate the weighting coefficients Caan, Cban, Cabn and Cbbn in accordance with equations (1), both the error signal vector Δa1, Δb1 of the reference signal vector and an error signal vector Δan, Δbn of the nth channel to be corrected are needed. The error signal vector Δan, Δbn of the nth channel to be corrected is then formed in accordance with the error signal vector of the reference frequency channel.
If a signal vector is only to be corrected in the lower frequency band, a simplified algorithm with symmetric weighting coefficients Caan, Cban, Cabn and Cbbn is sufficient. This may be the case, for example, when a time domain equalizer preceding the demodulator 2 and the serial/parallel converter 1 is used. The demands on the time domain equalizer are then less than the demands on a time domain equalizer without disturbance compensation. In this case, the weighting coefficients Caan, Cban, Cabn and Cbbn are then calculated as follows:Cbbn(k)=Caan(k−1)Cban(k)=Cabn(k−1)  (2a)
Due to the symmetry of the weighting coefficients, the storage space required for storing the weighting coefficients is advantageously reduced. In this case, the algorithm for the adjustment is as follows:Caan(k)=Caan(k−1)−g·(Δa1(k)·Δan(k)+Δb1(k)·Δbn(k))Cabn(k)=Cabn(k−1)−g·(Δa1(k)·Δbn(k)−Δb1(k)·Δan(k))  (2b)
To simplify the multiplication, the correcting variable g is selected as a power of 2−p. As a result, a simple shift register can be used for the multiplication by the correcting variable. A further simplification can be achieved by only using the sign for the real part Δai and the imaginary part Δbi of an error signal vector (this also applies to the simplified algorithm according to equations (2b)). The multiplications within the brackets of equations (2b) are thus reduced to a one-bit operation.
One advantage of this method consists in the reduced implementation effort as the compensation must be carried out at the block clock rate of the FFT demodulator and not at the clock rate of the sampling frequency and, on the other hand, the coefficients can be adjusted in a simple manner.
An accurate analysis of the compensation method described above with reference to FIG. 5 shows, however, that a complete extinction of the error caused by the recovery of the transmission channel, using a reference frequency channel, is only possible under the following conditions:                1) The recovery must have decayed after one block of the FFT demodulator; and        2) It must be possible to describe the transmission channel including transmit and receive filters by a second-order transfer function or, respectively, it must be possible to describe the recovery by means of a second-order linear differential equation with constant coefficients.        
Since the first condition is usually met but the second condition is usually not met, the error caused by the recovery also cannot be completely eliminated by means of the circuit arrangement of FIG. 5. A residual error remains. A disadvantage of the circuit arrangement of FIG. 5, therefore, consists in that, in systems with poor recovery, it may not be possible to compensate for the recovery with the necessary accuracy so that the method described above and the circuit arrangement described above can only be used to a limited extent in these cases.
A further disadvantage of the circuit arrangement of FIG. 5 consists in that the frequency channel of the reference signal vector, i.e. the reference frequency channel, cannot be used completely for data transmission since it is not compensated for. In addition, a wrong decision caused by the reference frequency channel can lead to a multiplication of errors within the FFT block considered.
A further disadvantage of the circuit arrangement of FIG. 5 consists in that its circuit is very complex.